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Hardware Architecture for Generative AI: Efficiency, Acceleration, and Deployment
ISBN Book

Hardware Architecture for Generative AI: Efficiency, Acceleration, and Deployment

Author:
Krishnan Visweswaran

ISBN: 978-93-49929-16-6

DOI: https://doi.org/10.63282/978-93-49929-16-6


Hardware Architecture for Generative AI: Efficiency, Acceleration, and Deployment starts from the workload. It examines what generative models actually compute, where time and energy go, and why operations like attention, matrix multiplication, and autoregressive decoding place such different demands on memory, bandwidth, and arithmetic units. From there it builds toward the design and deployment decisions that determine whether a system is fast, affordable, and practical. Generative AI has moved from research labs into everyday products, and the machines that run it have become as important as the models themselves. Hardware Architecture for Generative AI explains how large generative models, from transformer-based language models to image and multimodal systems, interact with the hardware that trains and serves them. It gives readers a shared vocabulary and a quantitative framework for reasoning about both sides of the problem. As models grow larger and are used more widely, the cost of running them has become a central constraint on what AI can do and who can afford to use it. Progress increasingly depends on co-design, where algorithms and hardware are developed with each other in mind. This book equips readers to take part in that work. Techniques that reduce the cost of computation without sacrificing output quality, including quantization, sparsity, operator fusion, and memory-aware scheduling. The emphasis is on understanding why each technique works and what it trades away. The architecture of GPUs, domain-specific accelerators, and emerging designs. Readers learn to analyze performance with tools such as roofline modeling and the distinction between compute-bound and memory-bound execution, so they can predict where bottlenecks will appear. The practical realities of running models at scale, from data centers to power-constrained edge devices: latency and throughput trade-offs, multi-device scaling, memory capacity for long contexts, and the economics that separate a promising prototype from a production system.


Krishnan Visweswaran is a technology professional, researcher, and engineering leader based in California, USA, with extensive experience in wireless communications, software quality engineering, artificial intelligence, embedded systems, and next-generation networking technologies. Throughout his career, he has worked with leading technology organizations including Meta, Amazon, Qualcomm, and Cisco, contributing to complex hardware-software systems, automation frameworks, intelligent platforms, and large-scale system validation.

He pursued graduate studies in Electrical Engineering at California State University, Long Beach, with a focus on communication systems, VLSI, RF and microwave engineering, digital signal processing, computer networks, and embedded systems.

His research interests include 6G wireless systems, AI-native networking, machine learning, edge intelligence, cloud computing, cybersecurity, and intelligent automation. His academic and professional projects span artificial intelligence, radar systems, robotics, VLSI design, embedded systems, wireless technologies, communication networks, and software automation.

His work focuses on bridging artificial intelligence and next-generation communication technologies to develop intelligent, secure, resilient, and scalable systems for the future of global connectivity.


Title: Hardware Architecture for Generative AI: Efficiency, Acceleration, and Deployment
Author: Krishnan Visweswaran
Publisher: ScienceTech Xplore
Copyright: ScienceTech Xplore
Language: English
Publication Format: Online
ISBN: 978-93-49929-16-6
DOI: https://doi.org/10.63282/978-93-49929-16-6
Subject/Genre: AI Architecture
Pages: 1-258
Chapters: 11
Year of Publication: 2026
URL: https://sciencetechxplore.org/978-93-49929-16-6.php
Cite As:

Visweswaran, K. (2026). Hardware Architecture for Generative AI: Efficiency, Acceleration, and Deployment. ScienceTech Xplore. https://doi.org/10.63282/978-93-49929-16-6

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